Update September 14, 2021
Here are a couple of pictures from the event.
Original Text, September 6, 2021
To improve the accessibility of our content, please find the audio version of this blog post.
ST will be presenting 12 papers (four of them co-authored with other partners), one keynote on AI at the edge, and will participate in six educational events at the ESSDERC and ESSCIRC Grenoble 2021, starting September 6. It will be a chance for engineers and thought leaders to get a unique perspective into R&D milestones. The European Solid-State Device Research Conference (ESSDERC) and the European Solid-State Circuits Conference (ESSCIRC) bring the industry together. CEA-Leti, Soitec, the Grenoble-Alpes University, and ST co-organized the event. Additionally, some of the leading foundries, trade organizations, and semiconductor makers in the world will sponsor the conferences. Put simply, ESSDERC and ESSCIRC are to our industry what the Sundance Film Festival is to cinema.
Learn more about ST’s full schedule at the ESSDERC and ESSCIRC conferences
ESSCIRC and ESSDERC Grenoble 2021: A Peek Behind the Curtains
The event is highly symbolic due to its scope. Despite a global pandemic, the industry continues to show resilience and strength through innovations. Indeed, the invitation for academic papers yielded impressive results both in terms of the number of submissions and their scope. ST alone will be presenting articles on imaging, phase-change memory, and material engineering. We will also offer papers on IC design specific to FD-SOI and Bipolar CMOS with a gate length of 55 nm (BiCMOS55). The discussions sometimes delve into manufacturing processes, others explore performance optimizations, while some try to make new technologies more accessible.
Hence, a common trend during this year’s ESSDERC and ESSCIRC is the desire to make practical contributions through meaningful innovations. The same desire also motivated ST to co-organize these two conferences and to chair the technical program for the first time. As a result, to help readers understand how both events will move the industry forward, we are offering a preview of some of the ST papers. An exhaustive overview of all of the ST articles is impossible. However, by highlighting some of the innovations on display, we hope to show where the industry is going and how it will affect users.
ESSCIRC and ESSDERC Grenoble 2021: Keynote on AI at the Edge
A Way Out of our Cloud Dependency
ST is opening the plenary talks with a focus on AI at the edge. Joel Hartmann, from ST, will explain why and how some AI applications are moving away from the cloud. The talk is thus highly symbolic for two reasons. It first demonstrates the industry’s appetite for this particular technology. Secondly, it shows that AI at the edge is moving to mainstream territories. Indeed, the idea of running neural networks on microcontrollers is not new. Since the earliest days, researchers understood that it enabled a whole new type of machine learning applications. However, Joel’s presentation will show that AI at the edge is gaining in popularity because it is a great way to reduce the power consumption of servers by reducing our reliance on cloud computing while taking advantage of 5G bandwidths to send data and results.
A Path to Meaningful Innovations in Smart Driving and More
Joel’s keynote is special because it delves into theoretical implications while exploring real-life examples. For instance, he will walk the audience through automotive applications. Indeed, AI at the edge is at the core of smarter sensors, automatic software reconfigurations, and breakthroughs in vision computing. He will also delve into neural network demonstrators that rest on an accelerator dedicated to deep convolutional neural networks. Finally, his paper tackles in-memory computing thanks to advances in FD-SOI and phase-change memory. For more on these last two innovations, we invite you to check out ST’s latest papers presented at VLSI 2021.
ESSCIRC and ESSDERC Grenoble 2021: Papers on Germanium
Germanium in Photonic Applications
ESSCIRC papers often include the latest research on material engineering. For instance, ST will explore components that combine silicon and germanium in photonic applications. One paper, entitled Design and Fabrication of a Ring-Coupled Mach-Zehnder Interferometer Gyroscope, looks at an optical gyroscope. In a nutshell, the device uses two optical signals traveling in opposite directions in a rotating loop. As force is applied to the device, the two beams meet at different points. Known as the Sagnac effect, it enables the creation of a gyroscope without a single moving part. Optical gyroscopes aren’t new, but they are traditionally expensive and bulky. By using silicon and germanium, it now becomes possible to envision more mainstream devices. The paper even shows how ST manufactured devices on a 300 mm photonic platform.
Analyzing Silicon-Germanium Alloys
This year’s conference is symbolic because it highlights the increasing popularity of silicon-germanium alloys. Hence, ST is also publishing a paper entitled Analytic model for optical properties of Si1-xGex alloys accounting for strain and temperature. The document looks at models that can help inform optical simulation tools. The paper is short but powerful as it explains how to take specific physical considerations to design optical systems better. It is thus an essential step for designers working on optoelectronic devices, such as photonic modulators or photodetectors.
Improving Phase-Change Memories Using Germanium-Antimony-Tellurium
Finally, ST will present a paper that looks at improving the reliability of phase-change memory that relies on germanium-antimony-tellurium (GST). Put simply, the research studies manufacturing optimizations and tests their efficacy. Among other things, the authors looked at the impact of processes on GST and how it affects performance. The paper doesn’t go into the processes themselves but shows that “Process B” offers significant advantages in cell endurance and retention, among other things. The results are thus substantial because they will contribute to the democratization of phase-change memory in many industries.
ESSCIRC and ESSDERC Grenoble 2021: Papers on Time-of-Flight Sensors
Better Planning for Dark Count Rate
In a paper called Dark Count Rate in Single-Photon Avalanche Diodes: Characterization and Modeling study, ST looks at improving the reliability and accuracy of the single-photon avalanche diodes at the heart of Time-of-Flight sensors. Traditionally, a ToF sensor determines the distance between itself and a surface by sending a laser, waiting for it to bounce back, and measure the time the round trip took. However, the photodetector may sometimes incorrectly perceive thermal changes as photons, a problem measured by the dark count rate (DCR). Studying DCR is critical when trying to improve the signal-to-noise ratio. Hence, the paper shows a better way to model DCR by localizing defects. The correlation is that engineers can better analyze doping profiles to improve their SPAD’s performance and reliability before entering the manufacturing process.
Higher Resolutions for Indirect Time-of-Flight Sensors
ST will also present a new indirect Time-of-Flight sensor meant to improve the performance of depth cameras. Traditionally, iToF sensors have a low resolution because they demand a high-power consumption, which leads to electromagnetic interferences and thus requires engineers to lower the number of pixels captured. In a paper entitled 4.6μm Low Power Indirect Time-of-Flight Pixel Achieving 88.5% Demodulation Contrast at 200 MHz for 0.54MPix Depth Camera, ST research demonstrates a power consumption of 1.4 µW/pixel at 200 MHz, compared to 7 µW/pixel in other devices, thanks to a new pixel architecture. The resolution of the sensor studied in the paper was relatively low at 0.54 megapixels, but the new architecture opens the door to vastly better devices than what manufacturers offer today.
The ESSCIRC and ESSDERC are both entirely online. The papers will be available starting September 6, 2021. Keynotes and interactive sessions will take place from September 13 to 17, while the educational week will begin on September 20 and end on September 22.
We would like to congratulate all authors an co-authors for their papers.
- Joel Hartmann, Artificial Intelligence: Why Moving it to the Edge?
- Cedric Tubert, 4.6μm Low Power Indirect Time-of-Flight Pixel Achieving 88.5% Demodulation Contrast at 200MHz for 0.54MPix Depth Camera
- Mathieu Sicre, Dark Count Rate in Single-Photon Avalanche Diode: Characterization and Modeling Study
- Alessandro Bertolini and Alessandro Gasparini, An 800-Ma Time-Based Boost Converter in 0.18um BCD with Right-Half-Plane Zero Elimination and 96% Power Efficiency
- Ricardo Gomez Gomez, A Review of Circuit Monitoring in 28nm FDSOI and 40nm Bulk CMOS Technologies
- Andrea Redaelli, Improving Ge-Rich GST ePCM Reliability Through BEOL Engineering
- Didier Céli, Impact of Hot Carrier Degradation on the Performances of Current Mirrors Based on a 55 nm BiCMOS Integrated Circuit Technology
- Andreia Cathelin, A 2.5-GHz Clock Recovery Circuit Based on a Back-Bias-Controlled Oscillator in 28-nm FDSOI
- Jeremy Grebot, Semi-Empirical Model for Optical Properties of SiGe Alloys Accounting for Strain and Temperature
- Remi Helleboid, Comprehensive Modeling and Characterization of Photon Detection Efficiency and Jitter in Advanced SPAD Devices
- Eva Kempf, Design and Fabrication of a Ring-Coupled Mach-Zehnder Interferometer Gyroscope
- Pascal Chevalier and Andreia Cathelin, 200-GS/S ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator
- Angel de Dios Gonzalez, A Wide Tuning Range Delay Element for Event-Driven Processing of Low-Frequency Signals in 28-nm FD-SOI CMOS
- Check out ST’s Agenda for ESSCIRC and ESSDERC Grenoble 2021